Computers Overview
Commodore PET
Sinclair ZX80
Sinclair ZX81
BBC Micro
Commodore 64
Sinclair Spectrum
Memotech MTX
    About
    Library
    Manuals
    Options
    Photos
    Projects
      CFX
      Hardware Hacks
      Legacy (1980s)
      MAGROM
      MTXPlus+
          Architecture
              CPU
                  CPLD
                  Ver.2 Z80
                  Ver.3 Z180
              Diagnostics
              Games ROM
              I/O Ports
              Power
              System Bus
              Video
          Design Data
          Firmware
          Parts
          Software
      PAL Reader
      Programmers
      ReMemotech
      ReMemorizer
      SDX
    Repairs
    Software
    Tools
    User Groups
    Video Wall
Memotech CP/M
Atari ST
DEC 3000 AXP
OpenVMS
Raspberry Pi

 

 
 
 

 

"MTX Plus+" CPU Board V 1.1 (Draft)

 

Superseded by Version 2.0

(Version 1 didn't even make it to prototype build stage)

The "draft" design for the CPU board is shown below, I think that all components and connections are there now but I need to clean up some floating logic inputs and add decoupling capacitors for the ICs. So far, the footprint indicates that I can fit everything that I plan onto a Eurocard board - although whether I can built it on a Eurocard form factor prototype board is another question . . .

My original plan was to build a prototype to check the functionality of the boards before getting them professionally made. However, the board is looking like it will require more effort than I had anticipated and I can get boards professionally made by iteadstudio for a very reasonable price. The minimum quantity is 5, but at $38 for the 5, it may not be worth the effort of trying to make a prototype first. I am probably just going to spend a lot of time checking the electronic and physical design before sending it off for manufacture.

"To-do" List

  • Optimise the logic gates

  • Add De-coupling capacitors

Potential Design Changes Identified

  • Add a an additional ROM board to allow the flexibility to have 7 (1 to 7) additional ROMs installed - in progress

Provisional schematic for the CPU board, drawn in Eeschema, the KiCad schematic editor.

The board holds the major components associated with the CPU, the CPU itself, CTC, ROM, Static RAM, clock generation, buffers for the address and data buses, DIN 41612 connector for the backplane bus and a "local" I/O connector for initial testing.

It does require a good dose of checking before finalising though.

The components laid out on a Eurocard sized PCB using  Pcbnew, the KiCad printed circuit board editor and the signals routed using the web based FreeROUTE Java application that interfaces to KiCad.
Pcbnew 3D visualisation of the placed and routed components

 

 

mailto: Webmaster

 Terms & Conditions