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"MTX Plus+"
Firmware
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VS1 GAL |
VS2 GAL |
Video Board
The
firmware on the Video board is programmed into a pair of GAL22V10s and performs these major functions:-
-
I/O
Port decode for the VDP and PSG
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VDP - CPU Interface Mode Select (see table)
-
CPU
- Video Read Strobe (CSR) enable
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CPU
- Video Write Strobe (CSW) enable
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CPU Wait State Generation for VDP and PIA
A "Test"
jumper on the Video board is used to select the I/O ports that
the VDP will respond to. The default position selects the MSX
Port range used for MTXPlus+ (98h to 9Ah),
the "Test" position selects the port range used for the
TMS9918/29 (01 & 02)in the MTX.
VDP - CPU Interface Modes
| |
A1
(Mode 1) |
A0
(Mode 0) |
Operation |
I/O Porth |
| Port
0 |
0 |
0 |
VRAM Data (R/W) |
98 |
| Port
1 |
0 |
1 |
Status Register (R)
VRAM
Address (W)
Register set-up (W) |
99 |
| Port
2 |
1 |
0 |
Palette registers (W) |
9A |
| Port
3 |
1 |
1 |
Register indirect addressing (W)
|
9B |
CPU Wait State Generation for VDP and PIA
CPU
clock speeds above about 6MHz exceed the specifications for the
VDP, PSG and/or the PIA used to drive the CF interface. To allow
these slower parts to be used at the higher clock frequencies,
one of the GALs on the video board inserts WAIT states during
I/O operations on these devices. See the
Wait States page for more
details.
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